wiRedPanda
Logic Circuit Simulator
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DFlipFlop.cpp
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1// Copyright 2015 - 2026, GIBIS-UNIFESP and the wiRedPanda contributors
2// SPDX-License-Identifier: GPL-3.0-or-later
3
5
8#include "App/Wiring/Port.h"
9
10template<>
13 .type = ElementType::DFlipFlop,
14 .group = ElementGroup::Memory,
15 .minInputSize = 4,
16 .maxInputSize = 4,
17 .minOutputSize = 2,
18 .maxOutputSize = 2,
19 .canChangeAppearance = true,
20 };
21 static_assert(validate(constraints));
22
24 {
26 meta.pixmapPath = []{ return DFlipFlop::pixmapPath(); };
27 meta.titleText = QT_TRANSLATE_NOOP("DFlipFlop", "D-FLIP-FLOP");
28 meta.translatedName = QT_TRANSLATE_NOOP("DFlipFlop", "D-Flip-Flop");
29 meta.trContext = "DFlipFlop";
30 return meta;
31 }
32
33 static inline const bool registered = []() {
35 ElementFactory::registerCreator(constraints.type, [] { return new DFlipFlop(); });
36 return true;
37 }();
38};
39
40DFlipFlop::DFlipFlop(QGraphicsItem *parent)
42{
43 // Call the most-derived override explicitly (see SRFlipFlop.cpp for rationale).
45}
46
48{
49 // Standard D flip-flop pin layout: D and Clock on the left,
50 // active-low ~Preset and ~Clear on top/bottom (asynchronous overrides),
51 // Q and ~Q on the right.
52 inputPort(0)->setPos( 0, 16); inputPort(0)->setName("Data");
53 inputPort(1)->setPos( 0, 48); inputPort(1)->setName("Clock");
54 inputPort(2)->setPos(32, 0); inputPort(2)->setName("~Preset");
55 inputPort(3)->setPos(32, 64); inputPort(3)->setName("~Clear");
56
57 outputPort(0)->setPos(64, 16); outputPort(0)->setName("Q");
58 outputPort(1)->setPos(64, 48); outputPort(1)->setName("~Q");
59
60 // ~Preset and ~Clear are optional; when unconnected they default to Active (HIGH = not asserted)
61 // because these signals are active-low — leaving them floating means "no override"
62 inputPort(2)->setRequired(false);
63 inputPort(3)->setRequired(false);
64
65 inputPort(2)->setDefaultStatus(Status::Active);
66 inputPort(3)->setDefaultStatus(Status::Active);
67
68 // Initial state: Q=0, ~Q=1 (reset/cleared state)
69 outputPort(0)->setDefaultStatus(Status::Inactive);
70 outputPort(1)->setDefaultStatus(Status::Active);
71}
72
74{
75 // Reload the pixmap before delegating to the base class (see SRFlipFlop.cpp).
78}
79
81{
82 if (!simUpdateInputs()) {
83 // Forget the last clock level while inputs are invalid: edge
84 // detection requires lastClk == Inactive, so recovery with the clock
85 // already high cannot fabricate a rising edge from stale state.
86 m_simLastClk = Status::Unknown;
87 return;
88 }
89 Status q0 = simOutputs().at(0);
90 Status q1 = simOutputs().at(1);
91 const Status D = simInputs().at(0);
92 const Status clk = simInputs().at(1);
93 const Status prst = simInputs().at(2);
94 const Status clr = simInputs().at(3);
95
96 if (clk == Status::Active && m_simLastClk == Status::Inactive) {
97 q0 = m_simLastValue;
98 q1 = (m_simLastValue == Status::Active) ? Status::Inactive : Status::Active;
99 }
100
101 if (prst == Status::Inactive || clr == Status::Inactive) {
102 q0 = (prst == Status::Inactive) ? Status::Active : Status::Inactive;
103 q1 = (clr == Status::Inactive) ? Status::Active : Status::Inactive;
104 }
105 m_simLastClk = clk;
106 m_simLastValue = D;
107 setOutputValue(0, q0);
108 setOutputValue(1, q1);
109}
110
112{
113 // Reset Q/~Q to power-on defaults via the base class, then restore the
114 // edge-detection variables so column 0 of the next sweep is treated as
115 // a fresh start (no phantom rising edge from a prior run).
117 m_simLastClk = Status::Inactive;
118 m_simLastValue = Status::Active;
119}
Graphic element for the D flip-flop.
Singleton factory for all circuit element types.
Self-registering element trait template and compile-time constraint validation.
ElementMetadata metadataFromConstraints(const ElementConstraints &c)
Converts ElementConstraints to an ElementMetadata with all constraint-derived fields set.
Definition ElementInfo.h:80
constexpr bool validate(const ElementConstraints &c)
Validates element constraints at compile time.
Definition ElementInfo.h:48
Enums::ElementType ElementType
Definition Enums.h:107
Enums::Status Status
Definition Enums.h:106
Port classes: Port (base), InputPort, and OutputPort.
Graphical representation of an edge-triggered D flip-flop.
Definition DFlipFlop.h:21
DFlipFlop(QGraphicsItem *parent=nullptr)
Constructs the element with optional parent.
Definition DFlipFlop.cpp:40
void updateLogic() override
Updates output state on each rising clock edge.
Definition DFlipFlop.cpp:80
void updatePortsProperties() override
Updates port names for this flip-flop.
Definition DFlipFlop.cpp:47
void updateTheme() override
Refreshes the pixmap when the application theme changes.
Definition DFlipFlop.cpp:73
void resetSimState() override
Resets Q/~Q outputs and edge-detection state to power-on defaults.
static QString pixmapPath()
Definition DFlipFlop.h:32
static void registerCreator(ElementType type, std::function< GraphicElement *()> creator)
Registers a creator lambda for type, used by buildElement().
static void registerMetadata(const ElementMetadata &meta)
Registers meta in the global map (called once per element type at startup).
GraphicElement(ElementType type, QGraphicsItem *parent=nullptr)
Constructs a graphic element of the given type, fetching all properties from the metadata registry.
const QVector< Status > & simInputs() const
Read-only view of the cached simulation input values.
virtual void updateTheme()
Updates the element's visual theme according to the current dark/light palette.
void setOutputValue(const int index, const Status value)
Sets simulation output port index to value.
InputPort * inputPort(const int index=0) const
Returns the input port at index (default 0).
OutputPort * outputPort(const int index=0) const
Returns the output port at index (default 0).
bool simUpdateInputs()
Snapshots each predecessor's output into the simulation input cache.
const QVector< Status > & simOutputs() const
Read-only view of the current simulation output values.
void setPixmap(const QString &pixmapPath)
Loads and applies the pixmap located at pixmapPath.
virtual void resetSimState()
Resets all simulation-visible state to power-on defaults.
void setRequired(const bool required)
Marks whether a wire to this port is mandatory.
Definition Port.cpp:199
void setDefaultStatus(const Status defaultStatus)
Sets the status applied when the port has no connection.
Definition Port.cpp:172
void setName(const QString &name)
Sets the label text shown next to the port.
Definition Port.cpp:166
Compile-time-validatable subset of ElementMetadata.
Definition ElementInfo.h:21
static const bool registered
Definition DFlipFlop.cpp:33
static ElementMetadata metadata()
Definition DFlipFlop.cpp:23
static constexpr ElementConstraints constraints
Definition DFlipFlop.cpp:12
Self-registering element information trait.
Compile-time-registered properties for one element type.