wiRedPanda
Logic Circuit Simulator
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VisibilityManager.cpp
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1// Copyright 2015 - 2026, GIBIS-UNIFESP and the wiRedPanda contributors
2// SPDX-License-Identifier: GPL-3.0-or-later
3
5
7#include "App/Scene/Scene.h"
9
11 : m_scene(scene)
12{
13}
14
15void VisibilityManager::showGates(const bool visible)
16{
17 m_showGates = visible;
18 const auto items = m_scene->items();
19
20 for (auto *item : items) {
21 if (item->type() == GraphicElement::Type) {
22 auto *element = qgraphicsitem_cast<GraphicElement *>(item);
23 if (!element) {
24 continue;
25 }
26 const auto group = element->elementGroup();
27
28 // Only hide/show internal logic gates; Input, Output and Other elements
29 // (e.g., labels, ICs) are always kept visible regardless of this toggle
30 if ((group != ElementGroup::Input) && (group != ElementGroup::Output) && (group != ElementGroup::Other)) {
31 item->setVisible(visible);
32 }
33 }
34 }
35}
36
37void VisibilityManager::showWires(const bool visible)
38{
39 m_showWires = visible;
40 const auto items = m_scene->items();
41
42 for (auto *item : items) {
43 if (item->type() == Connection::Type) {
44 item->setVisible(visible);
45 continue;
46 }
47
48 if (item->type() == GraphicElement::Type) {
49 auto *element = qgraphicsitem_cast<GraphicElement *>(item);
50
51 // Node elements are purely wire-routing helpers with no logical function;
52 // hiding wires should hide nodes too since they're meaningless without wires
53 if (element->elementType() == ElementType::Node) {
54 element->setVisible(visible);
55 } else {
56 // For other elements, hide only their port handles (the connectable dots),
57 // not the element body itself, so the gate symbols remain visible
58 for (auto *inputPort : element->inputs()) {
59 inputPort->setVisible(visible);
60 }
61
62 for (auto *outputPort : element->outputs()) {
63 outputPort->setVisible(visible);
64 }
65 }
66 }
67 }
68}
69
71{
72 showWires(m_showWires);
73 showGates(m_showGates);
74}
Connection: a wire that connects an output port to an input port in the circuit scene.
Abstract base class for all graphical circuit elements.
Main circuit editing scene with undo/redo and user interaction.
VisibilityManager: controls gate and wire visibility in the scene.
Main circuit editing scene.
Definition Scene.h:56
VisibilityManager(Scene *scene)
void showWires(bool visible)
Shows or hides connection wires, node elements, and port handles.
void reapply()
Reapplies current visibility state (used after structural changes).
void showGates(bool visible)
Shows or hides gate elements (Input/Output/Other groups are always visible).