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wiRedPanda
Logic Circuit Simulator
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Four-state logic operations for gate evaluation. More...
Go to the source code of this file.
Namespaces | |
| namespace | StatusOps |
Functions | |
| Status | StatusOps::statusAnd (const Status a, const Status b) |
| AND: Inactive dominates all; unknown propagates as-is. | |
| Status | StatusOps::statusAndAll (const QVector< Status > &inputs) |
| Fold AND over a range. Inactive dominates. | |
| Status | StatusOps::statusNot (const Status a) |
| NOT: inverts known values; Unknown -> Unknown, Error -> Error. | |
| Status | StatusOps::statusOr (const Status a, const Status b) |
| OR: Active dominates all; unknown propagates as-is. | |
| Status | StatusOps::statusOrAll (const QVector< Status > &inputs) |
| Fold OR over a range. Active dominates. | |
| Status | StatusOps::statusXor (const Status a, const Status b) |
| XOR: requires all inputs known; any Unknown -> Unknown, any Error -> Error. | |
| Status | StatusOps::statusXorAll (const QVector< Status > &inputs) |
Four-state logic operations for gate evaluation.
Domination rules (Unknown = not yet resolved, Error = bus conflict):
Unknown propagates benignly as "not yet resolved" and resolves once a dominant known value arrives via event-driven propagation.
Definition in file StatusOps.h.